1. Field of the Invention
The invention relates to a data storage system, and more particularly to a data storage system with an Inter Integrated circuit (I2C) interface.
2. Description of the Related Art
The inter Integrated circuit (I2C) interface is a two-lined serial bus interface invented by Philips Company. The I2C bus is a bidirectional, two-lined, serial and multi-master interface standard and has a bus arbitration scheme, wherein the I2C bus is suitable for small distances and occasional data communication between devices. The I2C interface has a perfect protocol to reliably provide transmitting and receiving of data. One apparatus used is a host apparatus for controlling bus transmission and generating a clock signal and another apparatus used is a slave apparatus for transmitting data. The host apparatus may also read data from the slave apparatus except when transmitting data to the slave apparatus. Therefore, the I2C is generally used in various applications due to usage of two simple hardware interface lines.
Referring to FIG. 1, FIG. 1 shows an RF tuner system applied with the I2C. As shown in FIG. 1, a master interface 101 of a host controller 10 controls a first slave interface 121 located at a base band processor 12 and a second slave interface 141 located at an RF tuner 14 to read or write data of the base band processor 12 and the RF tuner 14 through an I2C bus 11, respectively. The I2C bus 11 also connects to the second slave interface 141 of the RF tuner 14 when the host controller 10 only read or write data of the base band processor 12 through the first slave interface 121 and the I2C bus 11. Therefore, the host controller 10 will interfere with the RF tuner 14 although the host controller 10 does not read or write data of the RF tuner 14, and the interference will influence normal operation of the RF tuner 14 to cause problems.
Referring to FIG. 2, FIG. 2 shows another RF tuner system applied with an I2C. As shown in FIG. 2, a second master interface 222 is added in a base band processor 22. A host controller 20 can access data of an RF tuner 24 through a first slave interface 221 and the second master interface 222 of the base band processor 22. First, the first slave interface 221 of the base band processor 22 receives instructions sent from a first master interface 201 of the host controller 20 through a first I2C bus 21. Then, the second master interface 222 transforms the received instructions from the first slave interface 221, and transmits the instructions to a second slave interface 241 of the RF tuner 24 through a second I2C bus 23. Finally, the second slave interface 241 receives the transformed instructions from the second master interface 222 and executes data access operations corresponding to the transformed instructions. This method can avoid the noise generation problem of the RF tuner 24 caused by the RF tuner 24 receiving interference. However, the sending and transmitting of instructions and corresponding data must be transformed through the first slave interface 221 and the second master interface 222, therefore, consuming a lot of time and increasing data processing time.
According to above conventional methods of the I2C applied in an RF tuner, the invention provides a data storage system to solve the above problems existing in the above prior art.